FPGA Engineer At Algoquant In New Delhi


Location: New Delhi

Company: Algoquant

As an FPGA Engineer specialised in RTL (Register Transfer Level) coding, you will be responsible for designing, optimising, and implementing hardware solutions on Field-Programmable Gate Arrays (FPGAs) to support high-frequency trading strategies. You will work closely with the trading systems team to develop and deploy ultra-low latency trading infrastructure, ensuring the highest levels of performance, reliability, and efficiency.

Key Responsibilities:

RTL Design and Optimisation: Design and optimise FPGA-based solutions using RTL coding techniques to achieve ultra-low latency and high throughput for trading algorithms and strategies.

Algorithm Implementation: Implement trading algorithms and strategies in hardware, leveraging FPGA capabilities to minimise latency and maximise performance.

Hardware Acceleration: Identify opportunities for hardware acceleration of critical trading functions and develop FPGA-based solutions to achieve significant speedups.

Performance Analysis and Tuning: Conduct performance analysis of FPGA designs, identify bottlenecks, and fine-tune the implementations to achieve optimal performance.

Hardware Integration: Collaborate with software engineers and system architects to integrate FPGA-based solutions into the overall trading infrastructure, ensuring seamless operation and compatibility.

Testing and Validation: Develop test benches and perform thorough testing and validation of FPGA designs to ensure correctness, reliability, and robustness under real-world trading conditions.

Documentation and Reporting: Document FPGA designs, methodologies, and implementation details, and provide regular reports and updates to stakeholders on project progress and performance metrics.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Proven experience in FPGA design and development, with a focus on RTL coding using Verilog or VHDL.
  • Deep understanding of computer architecture, digital design principles, and hardware/software co-design concepts
  • Experience with high-frequency trading systems and ultra-low latency design techniques is highly desirable.
  • Proficiency in FPGA development tools and workflows, such as Xilinx Vivado or Intel Quartus.
  • Strong analytical and problem-solving skills, with the ability to optimise designs for performance, power, and resource utilisation.
  • Excellent communication and collaboration skills, with the ability to work effectively in a fast-paced, team-oriented environment.



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